Electrical Executive Lab Session Essay

ELECTRICAL ENGINEERING LAB SESSION you

Title: RESISTOR NETWORKS

Identity: Richard Lancaster

Date: 11th Sep 2010. Student Term: Richard Lancaster.

Id Zero: (09099972)

Study course: B. South carolina. Engineering Scientific research

Subject: Electric Engineering

Lecturer: Dr Matn Hayes

Targets:

1 . Initial familiarisation with D. C measurements.

2 . Introduction to the use of pSpice being a tool intended for emulating circuits. pSpice v9. 1 can be downloaded from Moodle or through

http://www.electronics-lab.com/downloads/schematic/013/

three or more. Verification from the fundamental laws of Electrical Science. four. Familiarise college students with the means of Laboratory Statement Writing and Submission just for this module

TOOLS:

Power Supply

Breadboard

Various Resistors

Multimeter

Leads

Laptop running pSpice College student Edition v9. 1

Process

For each in the following circuits: -

(i) Generate a pSpice schematic that establishes voltages and currents whatsoever points of interest. (ii) In a UL setting (note this step will probably be necessary only for Lab1 and one other laboratory during the course of the semester) experimentally determine the voltage in the Node A and the currents that are outlined in each circuit. (iii) For each outlet ensure that most results are offered in listar form. (iv) You should clearly compare your experimental results with your pSpice output in the tables that you generate.

The conclusion/observation sections of your record should give attention to how you have demonstrated the validity, or otherwise, of Kirchoff's laws.

P Spice Circuits 1-6:

Circuit one particular: Current Essential IR1

[pic]

Circuit a couple of: Currents Essential IR1 and IR2

[pic]

Circuit three or more: Currents Necessary IR2 and IR3

[pic]

Circuit 4: Currents Required IR2 and IR3 and IRC

[pic]

Circuit 5: (Replacing R3 with a 1K in circuit 4) Power Required IR2 and IR3 and IRC

[pic]

Signal 6: Employing P Spice determine voltages and power for a series parallel arrangement of not less than 5 resistors and 1 voltage supply of your choice.

[pic]

Theory:

Circuit 1: Current Required IR1

RT = R1+R2=2. 2k + 3. 3k sama dengan 5. 5k

IR1 = V/R = 10V/5. five carat = 1 ) 82m A

VA sama dengan IR1 sama dengan 1 . 82mA x a few. 3k sama dengan 6V

Circuit 2: Currents Required IR1 and IR2

RT =R1//R2=2. 2k // 3. three thousand = (2. 2*3. 3)/(2. 2+3. 3) = 1 ) 32k

IT = 10V / 1 . 32k sama dengan 7. your five m A

IR1 = 3. 3/5. 5 by 7. five = 5. 5m A

IR2 sama dengan 2 . 2/5. 5 times 7. five = a few. 0m A

VA = ItxR=7. 5x1. 32=10V

Routine 3: Power Required IR2 and IR3

RT sama dengan R1 + R2//R3 =1+1. 32= 2 . 32k

IT = 10V / installment payments on your 32k = 4. 3m A

IR2 = (3. 3/5. 5) x some. 310 sama dengan 2 . 58m A

IR3 = (2. 2/5. 5) x four. 310 = 1 . 72m A

VA = 5. 3 times (2. 2//3. 3) sama dengan 4. 3x1. 32=5. 676V

Circuit four: Currents Essential IR2 and IR3 and IRC

RT = ((R2//R3) + RA) // ( RB + RC)) + R1

sama dengan ((1. 32 +. 68) // 5. 5) + R1

sama dengan (2//5. 5) + you

= 1 . 47+1=2. 47k

IT = 10V / 2 . 47k = some. 04m A

IT=IRX(other lower leg of diagram)+IRC

IRC sama dengan 2/7. a few x some. 04 = 1 . 077m A

IRX=5. 5/7. 5x4. 04=2. 96mA

IR2 sama dengan R3/R2+R3x2. 96=3. 3/5. five x 2 . 96 = 1 . 776m A

IR3 = installment payments on your 2/5. 5 x installment payments on your 96 sama dengan 1 . 184m A

VIRTUAL ASSISTANT = IRX x R2//R3 = 2 . 96 by (1. 32) = several. 9V

Outlet 5: (Replacing R3 having a 1K in circuit 4) Currents Needed IR2 and IR3 and IRC Currents Required IR2 and IR3 and IRC

RT = (((R2//R3) & RA) // ( RB + RC)) + R1

= ((0. 6875 +. 68) // 5. 5) + R1

= 1 . 095 + 1

= 2 . 095k

IT sama dengan 10V as well as 2 . 095k = 5. 77m A

IT=IRX(other lower leg of diagram)+IRC

IRC sama dengan 1 . 3675 /6. 8675 x 5. 773 = 0. 95m A

IRx=4. 77-0. 95=3. 82m A on other leg of circuit

VETERANS ADMINISTRATION = a few. 82 back button 0. 6875 (R2//R3) = 2 . 624V

IR2=1/3. 2*3. 82=1. 193mA

IR3=2. 2 to 3. 2**3. 82=2. 626mA

Outlet 6:

Using pSpice decide voltages and currents to get a series parallel arrangement of not less than five resistors and one volt quality source of your choice.

RT=R1+((R2//R3)+RA))//RB+((R7+R8)//RC))

RT=1+(1. 32+0. 68)//(2. 2+(2. 2//3. 3))

RT=1+(2//3. 52)

RT=1+1. 275

RT=2. 275K

IT=10/2. 275=4. 395V

IRB=2/5. 52*4. 395=1. 5922mA

IRA=3. 52/5. 52*4. 395=2. 802mA

VA=IR=2. 803*1. 32=3. 699V

IR2=3. 3/5. 5*2. 802=1. 6812mA

IR3=2. 2/5. 5*2. 802=1. 1208mA

Effects:

Circuit 1: Current Required IR1

|Circuit 1 ...



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